We are seeking an experienced engineer to support the Research Technology function. You will be working in a small and highly technical team at an extremely low-level to dramatically increase the performance of the firm's machine learning training and inference. Your main focus will be on accelerating computation and networking; however, the remit is wide, and you should expect to be challenged.
They are not just writing CUDA code. You will be expected to push hardware beyond what the manufacturer thinks is achievable. Manufacturers will tell you things are impossible or just plain absurd and you will achieve it anyway. Amongst other things, you will be working on a sophisticated optimising compiler to create optimal execution plans mapping complex computational graphs to a variety of accelerated computing platforms taking both high-level (for example the consequences of a complex memory hierarchies) and low-level (for example micro-architectural restrictions on dispatch rates for different operation shapes) into account. This means both applying optimisations to the SSA intermediate representation as well as improving backend code generation. You will also be expected to hand-optimise real-world use cases to identify ways in which the compiler’s code generation may be improved.
Requirements
You will be an experienced software engineer, likely in C/C++/Rust or a similar language. You will be confident solving complex algorithmic problems.
In addition, the following experience would be of particular interest:
Writing Linux kernel modules or other experience in OS development.
Understanding of, and some experience targeting, commodity GPUs or other similar hardware.
Some experience working with SSA-based IRs.
A detailed understanding of PCI Express.
Experience writing drivers to interface to hardware (e.g., network cards or NVMe devices).
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Director
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